Version and Platform (required):
- Binary Ninja Version: 5.4.10025-dev Personal, 53064cdf
- OS: macos
- OS Version: 15.7.7
- CPU Architecture: arm64
Bug Description:
The RISC-V "V" Standard Extension is not implemented in Binary Ninja, requiring manual opcode-by-opcode function recreation to get to a reasonably coherent output.
Steps To Reproduce:
Open test_const_ldresnearl-riscv.bin.zip, set Image Base Address to 0x0 and Platform to rv64gc. Make sure to undefine any function that Binja tries to create, and define one at address 0x0.
Expected Behavior:
All instructions should be properly decoded like this (barring U32 endianness) https://godbolt.org/z/sfeMjvsro
Screenshots:
I've tagged the recognised regions; the binary-looking ones contain vector instructions.
Binary:
I've uploaded the binary above -- see "Steps to reproduce".
Additional Information:
Version and Platform (required):
Bug Description:
The RISC-V "V" Standard Extension is not implemented in Binary Ninja, requiring manual opcode-by-opcode function recreation to get to a reasonably coherent output.
Steps To Reproduce:
Open test_const_ldresnearl-riscv.bin.zip, set Image Base Address to
0x0and Platform torv64gc. Make sure to undefine any function that Binja tries to create, and define one at address 0x0.Expected Behavior:
All instructions should be properly decoded like this (barring U32 endianness) https://godbolt.org/z/sfeMjvsro
Screenshots:
I've tagged the recognised regions; the binary-looking ones contain vector instructions.
Binary:
I've uploaded the binary above -- see "Steps to reproduce".
Additional Information: