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[XRT-SMI] Gemm test update#9596

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maxzhen merged 7 commits intoXilinx:masterfrom
aktondak:gemm_update
Feb 18, 2026
Merged

[XRT-SMI] Gemm test update#9596
maxzhen merged 7 commits intoXilinx:masterfrom
aktondak:gemm_update

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@aktondak
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@aktondak aktondak commented Feb 10, 2026

Problem solved by the commit

This PR updates the Gemm test to query max clock for npu3 platform.

Bug / issue (if any) fixed, which PR introduced the bug, how it was discovered

https://jira.xilinx.com/browse/AIESW-10440
https://jira.xilinx.com/browse/AIESW-24842

How problem was solved, alternative solutions (if any) and why they were rejected

This PR creates a common query API between strix and NPU to query max clocks for both strx and npu3. This PR also now allows to run benchmarks in different pmode other that performance and turbo. The default is still performance.

Risks (if any) associated the changes in the commit

Might change some existing behavior.

What has been tested and how, request additional testing if necessary

Tested on Linux strix machine. Following results were seen when run on different pmodes (in sudo mode)

aktondak@xsjstrix45:/proj/rdi/staff/aktondak/xdna/xdna-driver/xrt/build$ xrt-smi validate -r gemm --pmode powersaver
WARNING: User doesn't have admin permissions to set performance mode. Running validate in Default mode
Validate Device           : [0000:c5:00.1]
    Platform              : NPU Strix
    Power Mode            : Default
-------------------------------------------------------------------------------
Test 1 [0000:c5:00.1]     : gemm 
    Details               : TOPS: 51.0                                          
    Test Status           : [PASSED]

Documentation impact (if any)

None

…k instead of max

Signed-off-by: Akshay Tondak <aktondak@amd.com>
Signed-off-by: Akshay Tondak <aktondak@amd.com>
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clang-tidy review says "All clean, LGTM! 👍"

Signed-off-by: Akshay Tondak <aktondak@amd.com>
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clang-tidy review says "All clean, LGTM! 👍"

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clang-tidy review says "All clean, LGTM! 👍"

run.start();
run.wait2();
}
uint64_t clock_mhz = get_clock(dev);
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getting clock value from PMF before starting the test should be returning a very low MHz as clocks will not ramp up. this would result in some non consistent tops and low tops

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get_clock() should be getting dynamic clock number from PMF

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The get_clock() api has been updated to query max clock for both strx and npu3. We'll change this once the DPM level querying is available from firmware

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looks good

Signed-off-by: Akshay Tondak <aktondak@amd.com>
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clang-tidy review says "All clean, LGTM! 👍"

if (res.type != xrt_core::query::xrt_resource_raw::resource_type::npu_clk_max)
continue;
npu_hclock = res.data_uint64;
}
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add the error message

if (npu_hclock == 0) {
  XBValidateUtils::logger(ptree, "Error", "NPU H-clock is 0");
  ptree.put("status", XBValidateUtils::test_token_failed);
  return;
}

Signed-off-by: Akshay Tondak <aktondak@amd.com>
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clang-tidy review says "All clean, LGTM! 👍"

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clang-tidy review says "All clean, LGTM! 👍"

@maxzhen maxzhen merged commit 2a5722d into Xilinx:master Feb 18, 2026
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