rp23xx/rp23xx-rv: Fix GPIO interrupt handler for RP2350B variant.

[paolovolpi]

The GPIO interrupt handler had hardcoded values that only worked correctly for RP2350A (30 GPIOs). For RP2350B (48 GPIOs):

• Loop count was hardcoded to 6 registers but should be computed based on RP23XX_GPIO_NUM (4 for RP2350A, 6 for RP2350B)
• Reserved bits mask was always applied at register index 3, but for RP2350B register 3 contains valid GPIOs 24-31. This caused interrupts for GPIOs 30-31 to be incorrectly discarded
• PWM port validation rejected valid ports 8-11 on RP2350B which has 12 PWM slices instead of 8

Changes:

• Add RP23XX_GPIO_NREGS macro to compute number of interrupt registers
• Use conditional compilation to only mask reserved bits on RP2350A where the last register has 6 valid GPIOs (bits 0-23)
• Fix PWM port validation to allow 12 ports on RP2350B

Summary

• Fix GPIO interrupt handler to properly support RP2350B variant with 48 GPIOs
• Fix PWM port validation to allow 12 PWM slices on RP2350B

Problem

The GPIO interrupt handler had hardcoded values that only worked for RP2350A (30 GPIOs):

• Loop count hardcoded to 6 registers instead of being computed from GPIO count
• Reserved bits mask always applied at register index 3, causing GPIOs 30-31 interrupts to be lost on RP2350B
• PWM port validation rejected valid ports 8-11 on RP2350B

Changes

• Add RP23XX_GPIO_NREGS macro to compute number of interrupt registers
• Use conditional compilation to only mask reserved bits on RP2350A
• Fix PWM port validation for RP2350B (12 PWM slices vs 8)

Testing

Tested on RP2350B hardware with GPIO interrupts on pins > 29.

Impact

Both ARM (rp23xx) and RISC-V (rp23xx-rv) architectures are fixed.