Added RISCV v6 release notes#2846
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@Rot127 would you please see if the current status are good and approve is so so that we can merge ? |
Rot127
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Just those small things. Mind though that I will merge this after the main RISC-V PR was merged.
docs/cs_v6_release_guide.md
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| * `CS_MODE_RISCV_ZBKC = 1 << 18` | ||
| * `CS_MODE_RISCV_ZBKX = 1 << 19` | ||
| * `CS_MODE_RISCV_ZBS = 1 << 20` | ||
| * NOTE1: All extensions above are disabled by default unless enabled by their option name or the corresponding command line flag in cstool. Any other extension is always enabled and can't be disabled. |
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| * NOTE1: All extensions above are disabled by default unless enabled by their option name or the corresponding command line flag in cstool. Any other extension is always enabled and can't be disabled. | |
| * NOTE: All extensions above are disabled by default unless enabled by their option name or the corresponding command line flag in cstool. Any other extension is always enabled and can't be disabled. |
docs/cs_v6_release_guide.md
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| * `CS_MODE_RISCV_ZBS = 1 << 20` | ||
| * NOTE1: All extensions above are disabled by default unless enabled by their option name or the corresponding command line flag in cstool. Any other extension is always enabled and can't be disabled. | ||
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| * NOTE2: RISC-V has a massive, sprawling list of extensions, but Capstone's internal implementaton choice of using a 32-bit mode field is not enough to cover all of them. For now, those extension flags above were added because their encoding space is conflicting with either each other or other extensions. More flags can be added later if bug reports come in requesting finer-grained extension control. However, the current implementation using bitfields imposes a strict upper limit and would likely be refactored for a more expansive mechanism in the future. See [this issue](https://github.com/capstone-engine/capstone/issues/2848) for more details. |
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| * NOTE2: RISC-V has a massive, sprawling list of extensions, but Capstone's internal implementaton choice of using a 32-bit mode field is not enough to cover all of them. For now, those extension flags above were added because their encoding space is conflicting with either each other or other extensions. More flags can be added later if bug reports come in requesting finer-grained extension control. However, the current implementation using bitfields imposes a strict upper limit and would likely be refactored for a more expansive mechanism in the future. See [this issue](https://github.com/capstone-engine/capstone/issues/2848) for more details. | |
| * NOTE: RISC-V has a massive, sprawling list of extensions, but Capstone's internal implementaton choice of using a 32-bit mode field is not enough to cover all of them. For now, those extension flags above were added because their encoding space is conflicting with either each other or other extensions. More flags can be added later if bug reports come in requesting finer-grained extension control. However, the current implementation using bitfields imposes a strict upper limit and would likely be refactored for a more expansive mechanism in the future. See [this issue](https://github.com/capstone-engine/capstone/issues/2848) for more details. |
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You can also consider using the Github markdown for note highlighting. Looks a little more fancy: https://github.com/orgs/community/discussions/16925
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Sorry, the note didn't show because of the indentation. Now I messed up the formatting even more :D |
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Thank you <3 for a while I thought the issue magically fixed itself because I was looking at the rich diff and wondering why it was broken then I saw the "Refresh" button and voila it was fixed ! I think we're done here and we will return to this when we merge Capstone main and the LLVM fork. |
Lol, the rich diff makes it look super weird. I thought it is still broken. But looks good if the file is normally showed, all good now. |
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