[HLSL] Test vector accumulation bounds and exact I32 contention - #8921
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Add an opt-in bounded raw UAV descriptor table to the existing vector
accumulation runner. Preserve its fully initialised root-SRV source and
all existing root-UAV cases. Check actual 64-byte destination alignment.
Exercise F16 and F32 with a view containing the complete vector but not
its guards, a view containing four of eight elements, and a view ending
at the vector start. Independently specified seeded results distinguish
accumulation from store, missing in-view updates, widened bounds and
outside writes. Only a partially viewed input vector admits either the
per-element result or a whole-operation no-op; the larger guarded
destination does not itself make the vector OOB. Typed guards belong to
the exact element comparison, while the byte oracle checks the prologue.
Add signed I32 contention using native int32_t data and the existing
four-component base-four dispatch-ID pattern. Across 256 invocations,
each digit contributes 384. Base {3,-7,11,-13} and seed
{101,-203,307,-409} yield {1253,-1611,3507,-3353}; all partial sums are
in range. Every invocation contributes a distinct whole vector, so one
unequal-vector drop/replay pair cannot cancel component-wise. This does
not claim detection of arbitrary cancelling combinations or rely on a
scalar-total check.
Fresh baseline and candidate use identical compiler/validator binaries
built from ef47f5a. All 91 existing per-test outcomes are unchanged.
Both bounded vector tests pass on preview WARP. The new I32 case
legitimately skips: SInt32 reports UAV=0. Its exact shader compiles and
validates as v4i32, but supported hardware and runtime-oracle non-vacuity
remain unproved. Existing baseline failures are not changed.
Local feature checkpoint before negative controls. This AI-assisted
engineering rationale and implementation await human review; publication
is not authorised.
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Jack Elliott (JoeCitizen)
marked this pull request as ready for review
September 14, 2026 20:23
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🟡 Changes recommended
Newly added fixture declarations violate the repository’s explicit-type convention.
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Pull request overview
Adds execution coverage for bounded vector accumulation and exact signed-I32 contention.
Changes:
- Tests F16/F32 in-bounds, partial-OOB, and full-OOB accumulation.
- Tests 256-way signed-I32 contention with guard validation.
- Supports bounded UAV descriptor views and alignment checks.
File summaries
| File | Description |
|---|---|
tools/clang/unittests/HLSLExec/LinAlgTests.cpp |
Extends vector-accumulation helpers and execution tests. |
Review details
Suppressed comments (1)
tools/clang/unittests/HLSLExec/LinAlgTests.cpp:9667
- These three new fixture declarations also use
autofor the simplestd::optional<cpu_oracle::TypedMatrix>return type, contrary to the repository's explicit-type convention and the neighboring vector tests atLinAlgTests.cpp:9634-9641. Please spell out the type.
const auto Input =
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Damyan Pepper (damyanp)
approved these changes
Sep 17, 2026
Joshua Batista (bob80905)
approved these changes
Sep 21, 2026
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LGTMUE
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Add bounded F16/F32 vector-accumulation tests with seeded results and typed guards, plus exact signed-I32 contention coverage using 256 distinct vectors.
Refs #7841.
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