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Fix strided load and store instruction#67

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ah-kiamarzi wants to merge 1 commit intomainfrom
ahk/S_L/S_S_fix
Open

Fix strided load and store instruction#67
ah-kiamarzi wants to merge 1 commit intomainfrom
ahk/S_L/S_S_fix

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@ah-kiamarzi
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@DiyouS
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DiyouS commented Mar 10, 2026

Hello, is there any news for this fix? I notice the CI failed in the previous run

end else begin
for (int bank = 0; bank < NrVRFBanks; bank++) begin
if(!write_request[bank][VLSU_VD_WD])begin
wbe_q[bank] <= '0;
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Please move comb logics outside of always_ff

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If I understand correctly, you are trying to add byte write support to VRF here right?
Will it still cause problems in the controller for chaining?

I will try the simulation on my side to debug with waveform these days

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[BUG] HW barrier needed after vector load (32 bit ew) [Bug] Hang after load with stride (32 bit ew)

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