audio: tensorflow: keyword detect

app/boards/intel_adsp_cavs25.conf

@@ -12,6 +12,14 @@ CONFIG_COMP_MFCC=y
 CONFIG_COMP_MULTIBAND_DRC=y
 CONFIG_COMP_VOLUME_WINDOWS_FADE=y
 CONFIG_FORMAT_CONVERT_HIFI3=n
+CONFIG_SOF_STAGING=y
+CONFIG_CPP=y
+CONFIG_STD_CPP17=y
+# cavs2.5 has no LLEXT/module-manager support (see CONFIG_LIBRARY_MANAGER=n
+# below), so build tensorflow in statically rather than as an LLEXT module.
+CONFIG_COMP_TENSORFLOW=y
+CONFIG_COMP_TENSORFLOW_DEBUG_TRACE=y
+CONFIG_STACK_SIZE_EDF=32768
 CONFIG_PCM_CONVERTER_FORMAT_S16LE=y
 CONFIG_PCM_CONVERTER_FORMAT_S24LE=y
 CONFIG_PCM_CONVERTER_FORMAT_S32LE=y
@@ -33,7 +41,8 @@ CONFIG_SOF_LOG_LEVEL_INF=y
 CONFIG_DEBUG_COREDUMP=y
 CONFIG_DEBUG_COREDUMP_BACKEND_INTEL_ADSP_MEM_WINDOW=y
 CONFIG_DEBUG_COREDUMP_MEMORY_DUMP_MIN=y
-CONFIG_HEAP_MEM_POOL_SIZE=8192
+CONFIG_HEAP_MEM_POOL_SIZE=32768
+CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE=32768
 
 # Zephyr / device drivers
 CONFIG_DAI_INIT_PRIORITY=70

scripts/tensorflow-clone.sh

@@ -24,8 +24,9 @@ declare -a COMMIT_ID=(
     "d37128311b445e758136b8602d1bbd2a755e115d"
 )
 
-# Directory where repositories will be cloned/updated.
-BASE_DIR="$HOME/work/sof"  # Or any other desired location
+# Directory where repositories will be cloned/updated. Override by exporting
+# BASE_DIR before invoking the script.
+BASE_DIR="${BASE_DIR:-$HOME/work/sof}"
 
 # Function to check if a commit ID exists in a repository
 check_commit() {

src/audio/buffers/audio_buffer.c

@@ -24,7 +24,10 @@
 int audio_buffer_attach_secondary_buffer(struct sof_audio_buffer *buffer, bool at_input,
 					 struct sof_audio_buffer *secondary_buffer)
 {
-	if (buffer->secondary_buffer_sink || buffer->secondary_buffer_source)
+	/* check per-side: allow attaching on both sides (needed for DP-to-DP) */
+	if (at_input && buffer->secondary_buffer_sink)
+		return -EINVAL;
+	if (!at_input && buffer->secondary_buffer_source)
 		return -EINVAL;
 
 	/* secondary buffer must share audio params with the primary buffer */
@@ -48,6 +51,50 @@ int audio_buffer_sync_secondary_buffer(struct sof_audio_buffer *buffer, size_t l
 	struct sof_source *data_src;
 	struct sof_sink *data_dst;
 
+	if (buffer->secondary_buffer_sink && buffer->secondary_buffer_source) {
+		/*
+		 * DP-to-DP case: both secondary buffers present.
+		 * Data flows: input_ring_buffer -> comp_buffer -> output_ring_buffer
+		 *
+		 * This buffer may be synced by two DP modules during the same LL cycle:
+		 *  - The source DP module syncs it via comp_dev_for_each_consumer (output)
+		 *  - The sink DP module syncs it via comp_dev_for_each_producer (input)
+		 *
+		 * Both steps run in order (source DP first, then sink DP). Performing
+		 * them both here in a single call ensures atomicity and correct
+		 * rate-limiting. The second call for the same buffer will be a no-op
+		 * since the comp_buffer will be empty.
+		 *
+		 * Step 1: copy from input secondary buffer to primary (comp_buffer).
+		 * No limit on input side - copy all available data.
+		 */
+		data_src = audio_buffer_get_source(buffer->secondary_buffer_sink);
+		data_dst = &buffer->_sink_api;
+
+		size_t data_available = source_get_data_available(data_src);
+		size_t free_size = sink_get_free_size(data_dst);
+		size_t to_copy = MIN(data_available, free_size);
+
+		err = source_to_sink_copy(data_src, data_dst, true, to_copy);
+		if (err)
+			return err;
+
+		/*
+		 * Step 2: copy from primary (comp_buffer) to output secondary buffer.
+		 * Apply the limit to the output side to control how much data
+		 * is made available to the downstream DP module per LL cycle.
+		 */
+		data_src = &buffer->_source_api;
+		data_dst = audio_buffer_get_sink(buffer->secondary_buffer_source);
+
+		data_available = source_get_data_available(data_src);
+		free_size = sink_get_free_size(data_dst);
+		to_copy = MIN(MIN(data_available, free_size), limit);
+
+		err = source_to_sink_copy(data_src, data_dst, true, to_copy);
+		return err;
+	}
+
 	if (buffer->secondary_buffer_sink) {
 		/*
 		 * audio_buffer sink API is shadowed, that means there's a secondary_buffer
@@ -203,18 +250,16 @@ uint32_t audio_buffer_sink_get_lft(struct sof_sink *sink)
 	return us_in_buffer;
 
 	/*
-	 * TODO, Currently there's no DP to DP connection
-	 * >>> the code below is never accessible and won't work because of cache incoherence <<<
-	 *
-	 * to make DP to DP connection possible:
+	 * NOTE: DP-to-DP connections are now supported via dual ring_buffers
+	 * attached as secondary buffers on both sides of a comp_buffer.
+	 * Data cascades: ring_buf_src -> comp_buffer -> ring_buf_sink
+	 * with syncing during each LL cycle.
 	 *
-	 * 1) module data must be ALWAYS located in non cached memory alias, allowing
-	 *    cross core access to params like period (needed below) and calling
-	 *    module_get_deadline for the next module, regardless of cores the modules are
-	 *    running on
-	 * 2) comp_buffer must be removed from all pipeline code, replaced with a generic abstract
-	 *    class audio_buffer - allowing using comp_buffer and ring_buffer without current
-	 *    "hybrid buffer" solution
+	 * Future improvements:
+	 * 1) module data should be in non-cached memory alias for reliable
+	 *    cross-core access to params like period and deadlines
+	 * 2) comp_buffer should be replaced with generic audio_buffer
+	 *    throughout pipeline code (Pipeline 2.0)
 	 */
 }
 

src/audio/buffers/ring_buffer.c

@@ -86,7 +86,6 @@ static inline void ring_buffer_writeback_shared(struct ring_buffer *ring_buffer,
 	dcache_writeback_region(ptr, size);
 }
 
-
 /**
  * @brief remove the queue from the list, free memory
  */
@@ -101,6 +100,12 @@ static void ring_buffer_free(struct sof_audio_buffer *audio_buffer)
 
 	sof_ctx_free(alloc, (__sparse_force void *)ring_buffer->_data_buffer);
 	sof_ctx_free(alloc, ring_buffer);
+
+	/* matches vregion_get() in ipc_comp_connect() for each ring_buffer */
+	if (alloc && alloc->vreg) {
+		if (!vregion_put(alloc->vreg))
+			rfree(alloc);
+	}
 }
 
 static void ring_buffer_reset(struct sof_audio_buffer *audio_buffer)

src/audio/mfcc/mfcc.c

@@ -241,7 +241,16 @@ static int mfcc_prepare(struct processing_module *mod,
 
 	/* Initialize MFCC, max_frames is set to dev->frames + 4 */
 	if (cd->config && data_size > 0) {
-		ret = mfcc_setup(mod, dev->frames + 4, audio_stream_get_rate(&sourceb->stream),
+		int max_frames = dev->frames + 4;
+
+		/* DP wakes on ibs (~1 hop of input); consume the whole
+		 * hop per call so we don't re-enter the DP thread many
+		 * times per LL tick just to nibble dev->frames at a time.
+		 */
+		if (dev->ipc_config.proc_domain == COMP_PROCESSING_DOMAIN_DP)
+			max_frames = MAX(max_frames, cd->config->frame_shift);
+
+		ret = mfcc_setup(mod, max_frames, audio_stream_get_rate(&sourceb->stream),
 				 audio_stream_get_channels(&sourceb->stream));
 		if (ret < 0) {
 			comp_err(dev, "setup failed.");

src/audio/mfcc/tune/decode_all.m

@@ -4,7 +4,7 @@
 % Copyright(c) 2026 Intel Corporation.
 
 num_ceps = 13;
-num_mel = 80;
+num_mel = 40;
 
 % MFCC cepstral output files (all int32 output, Q9.23)
 ceps_files = {'mfcc_s16.raw', 'mfcc_s24.raw', 'mfcc_s32.raw'};

src/audio/mfcc/tune/run_mfcc.sh

@@ -48,7 +48,7 @@ main() {
 	if [ -n "$XTENSA_PATH" ]; then
 		TESTBENCH_RUN="$XTENSA_PATH/xt-run $SOF_WORKSPACE/sof/tools/testbench/build_xt_testbench/sof-testbench4"
 		run_testbench "sof-hda-benchmark-mfcc" xt_mfcc_s16.raw xt_mfcc_s24.raw xt_mfcc_s32.raw "Xtensa MFCC"
-		run_testbench "sof-hda-benchmark-mfccmel" xt_mel_s16.raw xt_mel_s24.raw xt_mel_s32.raw "Xtensa MFCC Mel"
+		run_testbench "sof-hda-benchmark-mfccmel40" xt_mel_s16.raw xt_mel_s24.raw xt_mel_s32.raw "Xtensa MFCC Mel"
 	fi
 }
 

src/audio/mfcc/tune/setup_mfcc.m

@@ -31,6 +31,26 @@ function setup_mfcc()
 	setup.tplg_fn = 'mel80_compress.conf';
 	export_mfcc_setup(gen_cfg, setup);
 
+	% Blob for 40-bin/20ms-hop mel spectrogram, matching TFLM micro_speech's
+	% front-end shape (TFLM_FEATURE_SIZE=40, TFLM_FEATURE_STRIDE_MS=20,
+	% TFLM_FEATURE_DURATION_MS=30) for interim wake-word sanity-checking.
+	setup = get_mel_spectrogram_config();
+	setup.frame_length = 30.0; % 480 samples at 16 kHz
+	setup.frame_shift = 20.0; % 320 samples at 16 kHz
+	setup.num_mel_bins = 40;
+	setup.tplg_fn = 'mel40.conf';
+	export_mfcc_setup(gen_cfg, setup);
+
+	% Same 40-bin/20ms-hop mel spectrogram with compress PCM output for the
+	% on-device TFLM wake-word path (KPB -> SRC -> MFCC -> tflmcly).
+	setup = get_mel_spectrogram_config();
+	setup.frame_length = 30.0;
+	setup.frame_shift = 20.0;
+	setup.num_mel_bins = 40;
+	setup.compress_output = true;
+	setup.tplg_fn = 'mel40_compress.conf';
+	export_mfcc_setup(gen_cfg, setup);
+
 	% Blob for mel spectrogram with compress PCM output and DTX
 	setup = get_mel_spectrogram_config();
 	setup.compress_output = true;

src/audio/stft_process/stft_process-generic.c

@@ -4,7 +4,7 @@
 
 #include <sof/audio/format.h>
 #include <sof/common.h>
-#include <assert.h>
+#include <rtos/panic.h>
 #include <stdint.h>
 #include "stft_process.h"
 

src/audio/stft_process/stft_process-hifi3.c

@@ -13,7 +13,7 @@
 
 #include <sof/audio/format.h>
 #include <sof/common.h>
-#include <assert.h>
+#include <rtos/panic.h>
 #include <stdint.h>
 #include "stft_process.h"